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  • ID
    #55389260
  • Job type
    Full-time
  • Salary
    TBD
  • Source
    Renesas Electronics
  • Date
    2026-11-03
  • Deadline
    2027-01-02
 
Full-time

In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. As a Staff-level contributor, you will serve as the technical focal point, guiding the architecture and physical design of next-generation, high-performance semiconductor packages, including 2.5D/3D heterogeneous integration, chiplet-based architectures, high-density interposers, and advanced substrate technologies.This role requires deep expertise in advanced packaging R&D, cross-domain co-design, and the ability to define methods and procedures for complex, multi-die integration assignments. You will lead cross-functional alignment with global silicon design, signal integrity/power integrity (SI/PI), thermal, and product engineering teams, while driving the creation of new packaging design rules and methodologies.Key ResponsibilitiesPhysical Architecture Leadership: Lead package layout architecture and physical design for next-generation heterogeneous integration, including 2.5D/3D chiplet packaging, high-density interposers, bridge technologies (e.g., EMIB equivalents), RDL, and advanced FCBGA solutions.Methodology & Design Rules: Define, establish, and optimize package design rules and assembly Best Known Methods (BKMs); partner with foundries, substrate vendors, and OSATs to evaluate and validate advanced packaging capabilities, DRCs, and manufacturing limits.Cross-Functional Technical Focal Point: Act as the primary package architecture lead across SI/PI, thermal, tooling, and platform integration teams. Lead design reviews to establish project scope, align stakeholder requirements, and balance pin budgets against electrical and mechanical trade-offs.Layout & Release Management: Manage the complex package design cycle—including footprint assignment, stack-up structures, high-speed escape routing, power/ground distribution, and generation of manufacturing release outputs (Gerber/drill data, bump maps, assembly drawings).Mentorship: Provide technical mentorship and guidance to junior and intermediate package design engineers, establishing standardized CAD workflows, layout techniques, and technical training to drive consistent execution across the department.

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