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  • ID
    #19643190
  • Job type
    Permanent
  • Salary
    TBD
  • Source
    Cloudious LLC
  • Date
    2021-09-15
  • Deadline
    2021-11-13

FPGA Design Engineer

California, Santaclara, 95054 Santaclara USA
 
Permanent

Vacancy expired!

Job Description:

  • Looking for strong candidates with hands-on experience in adapting example FPGA designs in PCIE/CXL and Ethernet for VCS simulation and hardware checkout using Intel or Xilinx FPGAs.
  • The candidate should have deep knowledge of transaction level protocols and debug thereof from previous projects.
  • Some coding in System Verilog and exposure to testbench development with DPI interfaces with C/C code before targeting the design to FPGA is needed.
Location: Santa Clara Skills Required: FPGA, Systems Verilog, Verilog Roles: Model development experience using System Verilog. Good design knowledge is a must. Hands on experience in hardware description knowledge Verilog, system Verilog, Candidates should have good Validation knowledge Must have PCIe related knowledge and hands on experience in this protocol. Good knowledge of scripts like Perl, Python. Knowledge of Synopsys VCS, Verdi knowledge is a must Candidate should have knowledge of C/C .

Vacancy expired!

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